Interface between Two Parallel Computers

reportActive / Technical Report | Accession Number: ADA640521 | Open PDF

Abstract:

This document describes the high-speed interface developed by NUWC to support data transport between heterogeneous, massively parallel computers. The interface provides a sustained data transfer rate of up to 3.5 Mbytessecond between an Intel iWarp and a Thinking Machines CM200a. The design is adaptable to other VMEbus-compatible interface boards.

Author(s):
Bernecky, W. R.
Author Organization(s):
NAVAL UNDERSEA WARFARE CENTER NEWPORT DIV NEW LONDON CT NEW LONDON DETACHMENT
Descriptive Note:
Technical memo.
Supplementary Note:
NUWC2015
Pagination:
0024

Security Markings

DOCUMENT & CONTEXTUAL SUMMARY

Distribution:
Approved For Public Release
Distribution Statement:
Approved For Public Release; Distribution Is Unlimited.

RECORD

Collection: TR
Identifying Numbers
Report Number(s):
NUWC-NL-TM 941020
Monitor Series:
ONR
 Subject Terms
Joint Capability Areas:
JCA_6_Net Centric; JCA_6.1.3_Switching and Routing; JCA_6.1_Information Transport; JCA_6.4.1_Secure Information Exchange; JCA_8_Building Partnerships
Communities of Interest:
Materials and Manufacturing Processes
Descriptor(s):
*COMPUTERS, *INTERFACES, *PARALLEL PROCESSORS, COMPUTER PROGRAMS, HIGH VELOCITY, INFORMATION TRANSFER, PARALLEL PROCESSING, WORK STATIONS
Field(s)/Group(s):
Computer Programming and Software, Computer Hardware
Keyword(s):
INTEL STANDARD INTERFACE BOARD
Report Date:
1994 Feb 28
Creation Date:
2016 Dec 12