CHAMPION: A Software Design Environment for Adaptive Computing Systems and Application Specific Integrated Circuits (ASICs)

Adaptive Computing Systems ACSs can serve as flexible hardware accelerators for applications in domains such as image and signal processing. However, the mapping of applications onto ACSs using traditional methods can take months to develop and debug. To enable application designers to map their applications automatically, CHAMPION was developed to permit high-level design entry using the Khoros Cantata graphical programming environment and hide low-level details of the hardware architecture. The key idea underlying CHAMPION is its ability to reuse precompiled hardware modules written in VHDL. These modules produce identical results to fixed-point C modules installed in Cantata which the user interconnects graphically and simulates on a general purpose UNIX workstation. The resulting net-list is converted into a directed graph and manipulated by CHAMPION so that data widths and clock delays are matched. If the graph is too large for a single FPGA, then it is partitioned automatically. An automatic target recognition application was automatically mapped to a WildForce ACS containing five FPGAs, achieving a productivity gain of over 2000. Other moderately complex applications were mapped to multiple ACS platforms, as well as to single-chip ASICs. CHAMPION enables faster application development, ACSs to be utilized by a wider audience, and quick mapping onto multiple ACS platforms and ASICs, thereby exploiting rapid advances being made in hardware.