Integrated Circuit Design.

reportActive / Technical Report | Accession Number: ADA184486 | Open PDF

Abstract:

This report describes the results of a study on the chip design of a low-power filter, using state-of-the-art CMOS technology. The filter is for speech applications and is specified to have 1024 type with programmable weights and linear phase. The chip implementation is to have a word length of 8 to 12 bits and consume a maximum of 2.0 mA at 3.6V. Included are current capabilities of CMOSSOSbulk, technology, and in particular, the Hughes VHSIC CMOS process. The architecture of the filter is discussed and estimates are made for the power consumption, speed, device count, and projected chip size of the filter implementation. A comparison of a multiple tape and a single tape implementation of the filter is also presented in terms of power consumption and operational speed.

Author(s):
Wong, V. S. ; Gringberg, J.
Author Organization(s):
HUGHES RESEARCH LABS MALIBU CA
Descriptive Note:
Final rept. Dec 83-Apr 84,
Supplementary Note:
DOI: 10.21236/ADA184486
Pagination:
0062

Security Markings

DOCUMENT & CONTEXTUAL SUMMARY

Distribution:
Approved For Public Release

RECORD

Collection: TR
Identifying Numbers
Report Number(s):
NOSC-TD-1099
Contract/Grant Number(s):
N66001-84-C-0104
Monitor Series:
TD-1099
 Subject Terms
Joint Capability Areas:
JCA_6.2.1_Information Sharing; JCA_6.2.2_Computing Services; JCA_6_Net Centric; JCA_6.1.3_Switching and Routing; JCA_6.2_Enterprise Services; JCA_5_Command and Control; JCA_6.1_Information Transport; JCA_5.3_Planning; JCA_1.2.5_Lessons Learned; JCA_1.3_Human Capital Management; JCA_1_Force Support
Communities of Interest:
Advanced Electronics
Descriptor(s):
*INTEGRATED CIRCUITS, *COMPLEMENTARY METAL OXIDE SEMICONDUCTORS, *SILICON, SAPPHIRE, SUBSTRATES, DIGITAL FILTERS, CHIPS(ELECTRONICS)
Field(s)/Group(s):
Electrical and Electronic Equipment, Solid State Physics
Keyword(s):
Y S reports, SOS(Silicon On Sapphire), WUDN488839
Report Date:
1987 Jun 01