VHDL (VHSIC (Very High Speed Integrated Circuits) Hardware Descriptive Languages) Prototype Simulator.

This research effort studied, modeled and implemented a prototype simulator kernel for VHDL in a UNIX environment. The prototype simulator was written in the C programming language. The detailed design of the prototype simulator includes an installation guide, users manual, and design description. The simulation program, called VSIM for VHDL simulator, does not support the full capabilities of VHDL. It implements the simple signal assignment statement and models transport and inertial delay. Requirement specifications are given for both the prototype and a fully implemented VHDL simulator. Keywords Hardware Description language Theses Requirements.