Zero-IF Receiver Study. Revision.

The Zero-IF Receiver Study was performed to design and fabricate a breadboard model of a Zero-IF receiver with both analog and digital techniques. The value of this Zero-IF architecture will be fully realized when the low frequency circuits inherent in a Zero-IF system are reduced to one or two LSI circuits. In todays LSI technology, in which complete synthesizer subsystems may be integrated on a single chip less voltage controlled oscillator and crystal reference, the receiver becomes the transceiver subassembly that has the greatest need for unique size reduction techniques. This Zero-IF technique, when applied to the design of small hand-held FM transceivers, offers distinct advantages with respect to size and weight reduction. Not only can the IF and demodulator be integrated, but this receiver architecture places reduced requirements on the receiver preselector filters.