Design and Fabricate a CCD Analog Multiplier.

A CCD-based correlatorconvolver having 256 stages at which two analog signals are multiplied and summed has been designed, fabricated and tested. The design employs two dual-channel surface channel CCDs, source-follower buffered switched floating gate taps at each stage, diode injection input and as the key breakthrough element in the design, the analog multipliers are configured as four-transistor MOSFET balanced bridges. Various elements in the design were chosen and tested in isolation and combination both by means of computer simulations, and by a series of test pattern mask measurements in three wafer fabrication phases. Despite the size and complexity of the chip 8.7 Mn x 3.25 Mn, 4128 CCD cells and 4132 transistors, a good yield of 256 stage devices that functioned satisfactorily as correlators was obtained. On the basis of limited testing, the level of performance, however, fell short of that expected from previous component tests notably in the area of linearity of correlation or - 5 rather than or - 1 and in speed or 1 MHz rather than 10 MHz. Suggestions for further tests and experiments are given. Author