Design and Implementation of a Speech Coding Algorithm at 9600 B/S. Volume 2.

This report describes a speech coding algorithm for digital transmission of speech at a rate of 9600 bits per second and the implementation of this algorithm on a speech processing system. The algorithm combines pitch extraction loop, pitch compensating adaptive quantizer, sequentially adaptive linear predictor, and adaptive source coding to generate very high quality speech output. Although each of these elements has been previously applied to speech coding, the combination of all four of these elements has not been studied before. The speech coding algorithm has been implemented on a pair of CSPI MAP 300 Array Processors in real-time in the full-duplex mode. This report has been bound in two volumes. The second volume describes the real-time MAP implementation and includes Chapters 12 and Appendices E through G.