A Secure and Reliable High-Performance Field Programmable Gate Array for Information Processing

Cognitive systems have requirements that are not met by existing commercially available architectures such as multi-core microprocessors or reconfigurable logic. In collaboration with Air Force Research Laboratory AFRL, this project had the goal of creating a Field Programmable Gate Array architecture that is both high-performance and provides mechanisms to enforce secure operation. A new reconfigurable fabric was created with a number of unique features that enables secure bit-stream operation based on a hardware root of trust. A chip was created in collaboration with AFRL that included an AFRL design and the new asynchronous fabric, and the chip was submitted for fabrication through the Trusted Foundry Access Program.