Design of an Addressable Memory Controller.

The main memory is an essential subsystem in a Von Neumann type of stored program machine. Because of the speed gap existence between the processor and the main memory, there has been a constant need to improve the main memory to achieve a better throughput. One method is to use a CAM Content Addressable Memory. It is known as a very powerful facility for searching a particular item from a data array rather than from conventional memory. Investigated in this thesis are the discussion of CAM characteristics, timing analysis, CAM controller design and simulation results. The main results obtained in this thesis are timing characteristics of the CAM system and design considerations of the CAM controller.