An Array Computer for Digital Signal Processing

This report describes the implementation of a MIMD array computer designed and built at the Lincoln Laboratory for signal processing. Some of the software tools needed to successfully use such an array are discussed, and the software package written to allow debugging of the array from a host computer is described. The first application or the array, a 12-channel filter bank front- end for a speech recognition system, is discussed. Finally, a block diagram compiler is described. This compiler converts block diagrams, entered at a CAE workstation, into efficient assembly code for all cells in the array. Keywords include Block diagram compiler Digital signal processing MIMD architecture Multiprocessor and Processor arrays.