VLSI Research

reportActive / Technical Report | Accession Number: ADA134628 | Open PDF

Abstract:

Contents Second Generation Architecture Software Prototyping Multiprocessor Circuit Simulation Novel, High-Performance Architectures Speech Recognition Macrocells for Signal Processing Research in Circuit Simulation and Layout New VLSI Tools Distribution Berkeley Advanced CMOS and Technology.

Author(s):
Brodersen, R. W.
Author Organization(s):
CALIFORNIA UNIV BERKELEY ELECTRONICS RESEARCH LAB
Descriptive Note:
Semi-annual technical research & development status rept. Apr-Oct 1983
Supplementary Note:
Sponsored in part by DARPA.
Pagination:
0015

Security Markings

DOCUMENT & CONTEXTUAL SUMMARY

Distribution:
Approved For Public Release
Distribution Statement:
Approved For Public Release; Distribution Is Unlimited.

RECORD

Collection: TR
Identifying Numbers
Contract/Grant Number(s):
N00039-81-K-0251, ARPA ORDER-4031
Monitor Series:
NAVELEX
 Subject Terms
Joint Capability Areas:
JCA_6.1.3_Switching and Routing; JCA_6.1_Information Transport; JCA_6_Net Centric; JCA_5_Command and Control; JCA_5.3_Planning; JCA_1_Force Support; JCA_1.2.7_Experimentation; JCA_1.2_Force Preparation
Modernization Areas:
Microelectronics
Communities of Interest:
Advanced Electronics
Descriptor(s):
*COMPLEMENTARY METAL OXIDE SEMICONDUCTORS, *COMPUTER ARCHITECTURE, *ELECTRONICS, *INTEGRATED CIRCUITS, *SPEECH RECOGNITION, CIRCUITS, MULTIPROCESSORS, PERFORMANCE(ENGINEERING), REAL TIME, SIGNAL PROCESSING, SIMULATION
Field(s)/Group(s):
Electrical and Electronic Equipment, Computer Hardware, Solid State Physics
Keyword(s):
ERROR BITS, SMALLTALK, ASR(AUTOMATIC SPEECH RECOGNITION), UNIX OPERATING SYSTEM, VLSI(VERY LARGE SCALE INTEGRATION), BAD WORDS, SOFT ERRORS, CACHE MEMORIES, CADDY COMPUTER PROGRAM
Report Date:
1983 Oct 31