Multiple Microprocessor System (MMS) Design Study. Volume III.

reportActive / Technical Report | Accession Number: ADA086245 | Open PDF

Abstract:

This is a design for a Multiple Microprocessor System MMS to be built as part of the System Architecture Evaluation Facility SAEF being developed at RADC. The MMS was designed to be used in the modeling of a wide range of multiprocessor configurations for the purpose of evaluating their suitability to unique Air Force data processing requirements. Author

Author(s):
No Author(s) Identified
Author Organization(s):
HARRIS CORP MELBOURNE FL GOVERNMENT COMMUNICATION SYSTEMS DIV
Descriptive Note:
Final technical rept.
Supplementary Note:
See also Volume 4, AD-A086 067.
Pagination:
0036

Security Markings

DOCUMENT & CONTEXTUAL SUMMARY

Distribution:
Approved For Public Release

RECORD

Collection: TR
Identifying Numbers
Report Number(s):
RADC-TR-80-33-VOL-3
Contract/Grant Number(s):
F30602-78-C-0114
Task Number(s):
01
Project Number(s):
2529
Monitor Series:
TR-80-33-VOL-3
 Subject Terms
Joint Capability Areas:
JCA_6.1.3_Switching and Routing; JCA_6_Net Centric; JCA_6.1_Information Transport; JCA_5_Command and Control; JCA_1_Force Support; JCA_5.4_Decide; JCA_1.2.6_Concepts; JCA_1.2_Force Preparation; JCA_5.3_Planning
Communities of Interest:
Materials and Manufacturing Processes
Descriptor(s):
*MICROPROCESSORS, *COMPUTER ARCHITECTURE, MILITARY REQUIREMENTS, MULTIPROCESSORS, INPUT OUTPUT DEVICES, SYSTEMS ANALYSIS, AIR FORCE OPERATIONS, DATA PROCESSING EQUIPMENT
Field(s)/Group(s):
Computer Hardware
Keyword(s):
PE63728F, WURADC25290104
Report Date:
1980 Mar 01