Multi-Processor Bus Architecture

This report summarizes the results of a one-year study of very high data rate fiber optic buses for computer networks. The primary objectives were to 1 assess the data rate limitations of components and systems for optical fiber communications, 2 develop a preliminary design for a very high-data-rate optical bus with microprocessor interfaces, and 3 recommend a program of technology development directed towards implementation of such a bus. Mathematical models developed during the course of this program were used extensively for investigating the data rate limitations. The performance of each component was optimized by varying the key parameters, within limits consistent with the properties of known materials and fabrication techniques. The analysis indicates that best performance, as well as lowest cost and highest reliability, can be achieved by integrating all of the components for a bus terminal except for the optical fiber on a single semi-insulating gallium arsenide substrate. a technology development plan directed towards the realization of the optoelectronic integrated circuits needed for a very high-data-rate optical bus incorporating the features indicated above is outlined.