SPEED BUFFERING AND DIGITAL COMBINING TECHNIQUES.

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Abstract:

Four methods of speed buffering to synchronize asynchronous digital inputs were investigated. These are referred to as the variable fill, block fill, single bit stuffing, and continuous buffering techniques. An analysis and evaluation of these methods for combining four asynchronous pulse trains in the two 2 megabitsec range indicate that the single bit stuffing technique was the most promising. A frame format and an initial logic block diagram for a system using the single bit stuffing technique are presented. Author

Author(s):
Dooley, G. F. ; Cecka, R. A.
Author Organization(s):
SYSTEM SCIENCES CORP FALLS CHURCH VA
Descriptive Note:
Quarterly rept. no. 1, 28 Jun-30 Sep 66,
Pagination:
0028

Security Markings

DOCUMENT & CONTEXTUAL SUMMARY

Distribution:
Approved For Public Release

RECORD

Collection: TR
Identifying Numbers
Report Number(s):
ECOM-02544-1
Contract/Grant Number(s):
DA-28-043-AMC-02544(E)
Monitor Series:
02544-1
 Subject Terms
Communities of Interest:
No COI(s) Identified
Descriptor(s):
*INPUT OUTPUT DEVICES, SYNCHRONIZATION(ELECTRONICS), DIGITAL COMPUTERS, MULTIPLEXING, PROBABILITY, MEMORY DEVICES, COMPUTER LOGIC, CODING, ERRORS
Field(s)/Group(s):
Computer Hardware
Keyword(s):
BUFFERS(COMPUTERS)
Report Date:
1966 Oct 01