INVESTIGATION FOR A FIRST-IN FIRST-OUT DATA BUFFER MEMORY.

Data buffer memories of the First-In First-Out FIFO type are useful in digital communication and data processing system where a data source must be connected to a data receiver so as to allow transfer of data in an asynchronous fashion. Shift registers of up to several thousand bit length are required and shifting cycle speeds should reach two megacycles. This first quarterly report describes a magnetic thin film implementation for such a device. Experiments on high speed and high density domain tip propagation shift registers are described along with results of basic experiments of controlled domain transfer leading to the design of the device. A possible FIFO magnetic thin film and conductor pattern assembly is described, making use of two coupled shift registers. The timing and electronic circuitry associated with the device has been designed and is also described in this report. Author