THIN FILM TECHNIQUES FOR SILICON INTEGRATED CIRCUITS.

The objective of this program was to investigate the possibility of depositing thin polycrystalline films of metal and dielectric materials on the surface of a silicon integrated circuit in order to from resistive and capacitive elements which would enhance the performance capacibilities of integrated circuits. Phase II was concerned with the practical implementation of the key findings of Phase I by fabrication and evaluation of 200 thin film elements and silicon planar transitors on a common silicon substrate. In addition to the 200 thin film samples, 50 final samples of a thin film circuit and ten 3-input gates were required. The compatibility of the thin film process decided upon in Phase I was determined by monitoring certain transistors parameters under specified conditions at various steps in the fabrication process. The 200 thin film samples, the pertinent data, the 50 final samples and the ten 3-input gates have been forwarded to the COTR under separate cover. Author