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Hardware Intellectual Property (IP) Protection Through Provably Secure State-Space Obfuscation Security Analysis and Industrial Implementation of Dynamically Obfuscated Scan Chain (DOSC) Architecture Project


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This research investigated the use of logic locking and dynamically obfuscated scan chain (DOSC) to resist IP piracy when manufactured in a commercial cutting-edge semiconductor facility. Logic Locking, also known as Logic Obfuscation, has emerged as a promising solution to resist IP piracy. Logic locking introduces additional gates controlled by key input to conceal original functionality. The correct operation of the design is ensured once the correct unlocking key inputs are provided from a tamper-proof memory. Over the past ten years, researchers have proposed several logic locking methods. However, all these logic locking methods turned out to be breakable. A major attack driving force behind the vulnerability of these logic locking methods came out from the Boolean satisfiability-based (SAT) attacks. There are logic locking techniques that claim to be highly resistant to SAT attacks. Still, their outputs are highly corruptible, and their structural traces are more vulnerable to other attacks such as bypass attacks, signal probability skew attacks (SPS), and removal attacks. Dynamically obfuscated scan chain (DOSC) is complimentary to logic locking and prevents exfiltration of scan chain information used within a SAT attack.



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