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Multi-Computer Parallel Arrays, Pipeline Arrays, and Pyramids,
WISCONSIN UNIV-MADISON DEPT OF COMPUTER SCIENCES
This paper describes and examines parallel arrays, pipeline arrays and pyramids of arrays - their architecture, the kinds of image processing and pattern perception algorithms and programs for which they appear to be appropriate, and their appropriateness for VLSI implementations. Author
This article is from 'Proceedings of USC (University of Southern California) Workshop on VLSI (Very Large Scale Integration) & Modern Signal Processing, held at Los Angeles, California on 1-3 November 1982,' AD-A136 855, p74-75.