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Accession Number:
ADA191770
Title:
Architecture of the Systolic Linear Algebra Parallel Processor (SLAPP)
Corporate Author:
NAVAL OCEAN SYSTEMS CENTER SAN DIEGO CA
Report Date:
1986-08-01
Abstract:
This paper will present preliminary concepts for the design of a systolic array of processors specifically aimed at efficient implementation of a core set of matrix operations consisting of matrix multiplication, QRD, SVD and generalized SVD. The algorithms to be implemented will be discussed briefly. Concepts for efficient implementation of the algorithms will be presented along with future plans.
Supplementary Note:
DOI: 10.21236/ADA191770
Pages:
0006
Distribution Statement:
Approved for public release; distribution is unlimited.
File Size:
0.40MB
