ILLINOIS UNIV AT URBANA-CHAMPAIGN COORDINATED SCIENCE LAB
This thesis develops a computer hardware design language that 1 Has sufficient scope to describe multiprocessing systems and 2 Is specified so that syntactically correct programs describe systems which have deadlock-free control structures. This, it is shown, is accomplished without resorting to an unduly complex syntax for the language. The control problem associated with multiprocessing is quite complex, and the opportunities for creating a control structure which can hang-up are great. Specifying the computer hardware design language so that this pitfall can be avoided by staying within the bounds of the syntax, gives the user a true design tool which is more than just an aid for documenting the principles of operation of a system. The computer hardware design language can be used to design digital systems which conform to the following model the system partitions into a hierarchically organized asynchronous control structure and a data structure. Actions in the data structure are assumed to be representable as register-transfers. The coordination of these actions is accomplished by the control structure. Two approaches to implementing the computer hardware design language programs are discussed. The first is an asynchronous realization using asynchronous modules the second a pseudo-asynchronous realization -- it is a synchronous realization that is viewed as an asynchronous one.