Accession Number:

AD1076102

Title:

Ultra-low-power RRAM-based FPGA: A Road towards Reconfigurable Edge Computing

Corporate Author:

University of Utah Salt Lake City United States

Report Date:

2019-03-25

Abstract:

The trends in Internet-of-Thing IoT require specialized hardware systems to be more computing capable than ever while at the same time satisfying an ultra-low power budget. Field Programmable Gate Arrays FPGAs, thanks to their reconfigurable nature, have been an ubiquitous media in many edge computing systems. However, low-power FPGAs generally suffers from large delay degradation up to 2, missing to achieve the computing capability required by many modern edge computing applications. In this paper, we investigate the opportunity of using Resistive Random Access Memories RRAMs in ultra-low-power FPGA architectures. We i evaluate the circuit design aspects of RRAM-based routing multiplexers ii introduce a novel design flow to accurate analyze FPGA architectures and iii study the opportunity of building near-Vt RRAM-based FPGA. Full-chip layouts and SPICE simulations present that at nominal operating voltage, RRAM-based FPGAs can improve up to82216 in areadelaypower, as compared to SRAM-based counterparts. Compared to SRAM-based FPGAs working at its nominal voltage, a near-Vt RRAM-based FPGAs can outperform by about 2 the Energy-Delay Product without delay overhead.

Descriptive Note:

Conference Paper

Supplementary Note:

GOMACTech Conference (GOMACTech 19) , 25 Mar 2019, 28 Mar 2019, See also AD1074821 - GOMACTech Conference (GOMACTech 19) "Artificial Intelligence and Cyber Security: Challenges and Opportunities for the Government" held in Albuquerque, NM 25-28 March 2019.

Pages:

0006

Communities Of Interest:

Modernization Areas:

Distribution Statement:

Approved For Public Release;

File Size:

2.12MB