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Accession Number:
AD1043295
Title:
Full Custom Integrated Circuit (IC) Design Flow at U.S. Army Research Laboratory
Corporate Author:
US Army Research Laboratory Adelphi United States
Report Date:
2011-02-01
Abstract:
The steps required to set up and run the Cadence Full Custom Integrated Circuit Design Flow are given in detail. Included is a walkthrough showing the design of an inverter, from schematic capture through layout, including design rule check DRC, layout versus schematic LVS and parasitic extraction.
Descriptive Note:
Technical Report
Pages:
0028
Distribution Statement:
Approved For Public Release;
File Size:
0.67MB
