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Building a Library for Microelectronics Verification with Topological Constraints

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513th Electronic Warfare Squadron Eglin AFB United States

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This paper proposes a methodology to build a library for gate-level microelectronics verification with topological constraints. Circuits at the second level of abstraction are selected from prior work on simulated reverse-engineered hardware. We show that when signal pairs are switched while maintaining circuit functionality, the topological genus varies according to a frequency distribution that differs for each circuit.

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Conference Paper

Supplementary Note:

42nd Annual Gomactech Conference (GOMACTech 17), 20 Mar 2017, 23 Nov 2017, See also AD1034309 - 42nd Annual Gomactech Conference (GOMACTech 17) Government Microcircuit Applications And Critical Technology Conference. Technologies For Secure Spectrum Access From Dc To Light. Held At The Grand Sierra Resort, Reno, Nevada, March 20-23, 2017.



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Approved For Public Release;

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