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Accession Number:
AD0880510
Title:
Advanced Avionic Digital Computer; Arithmetic and Control Unit Design Study.
Corporate Author:
HUGHES AIRCRAFT CO CULVER CITY CA
Report Date:
1970-12-01
Abstract:
Design tradeoffs leading to recommended baselines are developed for the arithmetic unit and control unit of the Advanced Avionic Digital Computer AADC, which is intended for wide applicability across the spectrum of 1975-1985 Naval avionic systems. Baseline arithmetic and control units, operating together with a 150 ns cycle time task memory, exceed target execution speed goals of 2 million instructions per second, while the extreme application flexibility fundamental to AADC effectivity is emphasized. Assuming 3 ns logic gate delay, each unit requires one LSI wafer of 10,000 gate complexity. In addition, the control unit requires 51,000 bits of microprogram memory, and the arithmetic unit requires 128,000 bits of microprogram memory, assuming 50 ns cycle time. Author
Descriptive Note:
Final rept. 25 Jun-Dec 70,
Pages:
0200
Contract Number:
N62269-70-C-0534
File Size:
0.00MB
