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Accession Number:
AD0835767
Title:
DIGITAL PROCESSING RECEIVER STUDY.
Corporate Author:
PHILCO-FORD CORP PALO ALTO CA SPACE AND RE-ENTRY SYSTEMS DIV
Report Date:
1968-05-01
Abstract:
Results of an engineering investigation of digital processing receivers are described in this report. Both analytical and experimental work are discussed. Two general aspects to digital receivers are studied 1 measurement of envelopeamplitude and 2 phasefrequency. A major consideration in the evaluation of these digital techniques is the maximum modulation frequency which can be demodulated accurately in the absence of noise for a given clock rate. Two types of phase demodulation receive major attention the arcsine demodulator which employs in-phase and quadrature channel measurements, and the digital phase-locked loop DPLL. Both the effects of quantization noise and additive thermal noise are considered for each of these techniques. Several forms of delta-modulator AD converters are treated in the amplitudeenvelope investigation. In addition, variable slope or adaptive delta modulators are described which have an increased dynamic range with respect to slope-overload. Author
Descriptive Note:
Final rept. Apr 67-Apr 68,
Pages:
0182
Contract Number:
F30602-67-C-0251
File Size:
0.00MB
