DID YOU KNOW? DTIC has over 3.5 million final reports on DoD funded research, development, test, and evaluation activities available to our registered users. Click
HERE to register or log in.
Accession Number:
AD0417465
Title:
LOOPS IN DIRECTED COMBINATIONAL SWITCHING NETWORKS,
Corporate Author:
STANFORD UNIV CA STANFORD ELECTRONICS LABS
Report Date:
1963-04-01
Abstract:
A study is presented of minimal combinational network synthesis. A loop in a network of directed elements is identified as a closed path which traverses each element encountered in the direction from input to output. An examination of such loops in networks of binary switching gate elements reveals that some of them operate in a combinational manner, yet others produce a sequential output. In networks of branch ele ments, sequential operation does not a Here the problem with loops arises in attempting to discover the form of the Boolean function expres sion which corresponds to the network. Three standard matrix forms are presented as tools for analyzing networks with loops. By converting gate networks to a standard system of gate ele ments-including only AND, OR, and NOT-and by using a transformation of gate-to-branch ele ments, these matrices can be used to analyze all binary switching structures. Synthesis tech niques are presented to discover networks which require loops for minimality. These techniques depend on an exhaustive study of nonloop chain realizations of the Boolean functions. Several examples are presented to demonstrate both the methods of analysis and of synthesis. Author
Pages:
0051
Contract Number:
NOnr-22524
File Size:
0.00MB