C-V and I-V Simulations of Metal Ferroelectric Silicon Capped and Uncapped BaMgF sub4 Devices Using Pisces II-B,
SYMETRIX CORP COLORADO SPRINGS CO
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Simulation of BaMgF4 metal-ferroelectric-silicon field effect transistors MFSFETs are presented based on experimentally derived CV data shown recently in the literature. A standard 2-D semiconductor device simulator PISCES II-B is used. The modulation of the semiconductor surface is modelled by adding the net BaMgF4 capped with ZrO2 or not, polarization charge to the interface charge. The model correctly describes the experimental CV behavior including the sense of the CV curve indicating pure ferroelectric modulation. The effect of threshold voltage modulation by the ferroelectric is also examined. The device model clearly shows the adaptive transistor behavior of the I sub DS vs V sub gP sub r characteristics. These simulations are being used as tools for device design and process integration towards the development of nondestructively read ferroelectric memories.
- Electricity and Magnetism
- Electrical and Electronic Equipment