Accession Number:

ADP002348

Title:

Synthesis Method for Ternary Logic Function Based on Nand-Type Polypheck,

Descriptive Note:

Corporate Author:

HIMEJI INST OF TECH (JAPAN) DEPT OF ELECTRONICS

Personal Author(s):

• Yanagita,M.
• Fukuda,N.
• Miyoshi,Y.
• Nakashima,K.
• Yamato,K.

Report Date:

1983-05-01

Pagination or Media Count:

5.0

Abstract:

This paper studies the synthesis of ternary logic functions based on a NAND-type polypheck. The size of term is the arithmetic sum of its truth values over all assignments of variable values. It serves as a measure of complexity. Author

Descriptors:

• *Switching circuits
• *NAND gates
• *Logic circuits
• *Symposia
• Synthesis
• Functions
• Value
• Variables
• Japan

Subject Categories:

Distribution Statement:

APPROVED FOR PUBLIC RELEASE