Accession Number:

ADD020469

Title:

Compact Filter Design

Descriptive Note:

Patent application, Filed 30 September 2010

Corporate Author:

NAVAL UNDERSEA WARFARE CENTER DIV NEWPORT RI

Personal Author(s):

Report Date:

2010-09-30

Pagination or Media Count:

21.0

Abstract:

An apparatus and method for signal detection in which a digital sample stream is fed round robin into a plurality of buffers, which are sequentially compared with a reference signal to determine a match. A processor determines the chronological order of the samples in each bit of each buffer, and directs a bitwise comparison between the signal in each buffer with the reference to determine a match, e.g., by correlation. The apparatus and method are preferably implemented with a Field- Programmable Gate Array FPGA. This scheme permits real time correlation of a data stream with a reference without use of shift registers, or a significant number of dedicated logic blocks.

Subject Categories:

  • Pumps, Filters, Pipes, Tubing, Fittings and Valves

Distribution Statement:

APPROVED FOR PUBLIC RELEASE