Accession Number:

ADD014507

Title:

CMOS Analog Four-Quadrant Multiplier.

Descriptive Note:

Patent, Filed 12 Jan 89, patented 6 Mar 90,

Corporate Author:

DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s):

• Shoemaker, Patrick A.
• Haviland, Gene L.
• Lagnado, Isaac

Report Date:

1990-03-06

Pagination or Media Count:

12.0

Abstract:

A four-quadrant analog multiplier circuit provides an output which is proportional to two voltage inputs. The circuit includes a pair of depletion mode transistors having gain constants equal in magnitude and threshold voltages equal in magnitude. The gates of the transistors are coupled in common. One input is applied to the common gates. The other input and its inverse are separately applied to sourcedrain terminals of the two transistors. Patents. jhd

Descriptors:

• *ELECTRONIC MULTIPLIERS
• *PATENTS
• DEPLETION
• GAIN
• GATES(CIRCUITS)
• INPUT
• SOURCES
• TERMINALS
• THRESHOLD EFFECTS
• LEAKAGE(ELECTRICAL)
• TRANSISTORS
• VOLTAGE

Subject Categories:

• Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE