Method of Producing a Thin Silicon-on-Insulator Layer.
Patent Application, Filed 29 Sep 89,
DEPARTMENT OF THE NAVY WASHINGTON DC
Pagination or Media Count:
A process for fabricating thin film silicon wafers using a novel etch stop composed of a silicon-germanium alloy includes properly doping a prime silicon wafer for the desired application, growing a strained Si1-xGex alloy layer onto seed wafer to serve as an etch stop, growing a silicon layer on the strained alloy layer with a desired thickness to form the active device region, oxidizing the prime wafer and a test wafer, bonding the oxide surfaces of the test and prime wafers, machining the backside of the prime wafer and selectively etching the same to remove the silicon, removing the strained alloy layer by a non-selective etch, thereby leaving the device region silicon layer. In an alternate embodiment, the process includes implanting germanium, tin, or lead ions to form the strained etch stop layer. Keywords Semiconductors Patent applications. aw
- Electrical and Electronic Equipment