Accession Number:

ADD014007

Title:

Complex Arithmetic Vector Processor for Performing Control Function, Scalar Operation, and Set-Up of Vector Signal Processing Instruction.

Descriptive Note:

Patent, Filed 10 Jun 86, patented 26 Jul 88,

Corporate Author:

DEPARTMENT OF THE AIR FORCE WASHINGTON DC

Personal Author(s):

• Webb, Richard F.

Report Date:

1988-07-26

Pagination or Media Count:

35.0

Abstract:

The processor is optimized for high-speed processing of large vectors, to fully utilize VHSIC technology, and to implement a signal processor having the highest possible throughput per volume while maintaining flexibility. It includes a 25 MHz embedded 1750A computer for performing control function scalar operations and set-up of vector signal processing instructions to be performed by a vector processing unit. The 40 MHz vector processing unit VPU performs high speed processing of real and complex vectors. The VPUs control portion provides an interface and status to the embedded 1750A computer. It also provides the control necessary for vector processing to occur concurrently with 1750A computer. It also provides the control necessary for vector processing to occur concurrently with 1750A execution and concurrent with IO or vector data. Keywords Multiprocessors, Patents. KR

Descriptors:

• *MULTIPROCESSORS
• *SIGNAL PROCESSING
• ARITHMETIC UNITS
• CONTROL
• OPTIMIZATION
• HIGH RATE
• INSTRUCTIONS
• INTEGRATED CIRCUITS
• OPERATION
• PATENTS
• PROCESSING EQUIPMENT
• SCALAR FUNCTIONS

Subject Categories:

• Computer Hardware
• Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE