Method for Making Germanium/Gallium Arsenide High Mobility Complementary Logic Transistors.
Patent, Filed 20 May 85, patented 1 Dec 87,
DEPARTMENT OF THE NAVY WASHINGTON DC
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The present invention relates to complementary logic field effect transistors having high electron and hole mobility and above to maintain transistor action at cryogenic temperatures. In one embodiment germanium material is deposited upon a gallium arsenide substrate and high hole concentration areas and high electron concentration areas are created in the germanium layer. In another embodiment a germanium substrate is provided and a gallium arsenide layer is grown upon the germanium substrate with appropriate high hole concentration areas and high electron concentration areas being created within the gallium arsenide.
- Solid State Physics
- Electrical and Electronic Equipment