Digital Clock Synchronizer Apparatus.
Patent Application, Filed 25 Jun 87,
DEPARTMENT OF THE AIR FORCE WASHINGTON DC
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A digital clock synchronizer apparatus generating multiple equally spaced time delay clock signals which are used by a time relationship between the received digital signal and the reference clock. Control signals which correspond to the time relationship are applied to first and second variable time delay units to generate the receive and transmit clocks.
- Test Facilities, Equipment and Methods