Accession Number:

ADD012906

Title:

Defect Detection and Thickness Mapping of the Passivation Layer(s) of Integrated Circuits.

Descriptive Note:

Patent application,

Corporate Author:

DEPARTMENT OF THE ARMY WASHINGTON DC

Personal Author(s):

Report Date:

1987-06-15

Pagination or Media Count:

19.0

Abstract:

A narrow, high energy, electron beam is caused to impinge upon an integrated circuit. The accelerating voltage of the electron beam is increased until the electrons have just enough energy to penetrate through the thickness of the passivation layer SiO2. The accelerating voltage is then increased a predetermined amount 3-5 KeV above the voltage required for passivation layer penetration. The transmitted electrons interact with the sublayer or film material Al to generate distinct X-rays. The increased-intensity electron beam is xy or raster scanned over the area of interest of the IC chip. The X-ray intensities generated during the raster scan are detected and stored e.g., in a RAM. After a complete scan of the area of interest, the X-ray intensities are read out of store and visually displayed on a CRT. Through correlation of measured and predicted X-ray intensities, a scanning thickness mapping is available for displayquantitative analysis of the thickness profile of a passivation layer. Author

Subject Categories:

  • Test Facilities, Equipment and Methods
  • Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE