Accession Number:

ADD010582

Title:

Multi Level Resist Technique for Lithography on Ceramic Substrates.

Descriptive Note:

Patent Applications,

Corporate Author:

DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s):

Report Date:

1983-08-19

Pagination or Media Count:

13.0

Abstract:

A method for forming a microelectronic circuit and the microelectronic circuit produced by the method. A three level multiresist layer is deposited on the metal-coated surface of a substrate. The multiresist includes a thick polyimide layer, a thin metal layer, and a photo resist layer. A circuit pattern is formed in the photo resist layer and etched into the thin metal layer. The thin metal layer is utilized as a mask for plasma etching the circuit pattern into the thick polyimide layer and for exposing a region of the metal coating corresponding to the circuit pattern. A metallization is then formed by up-plating on the exposed metal coating. The resulting microelectronic circuit has very tight fabrication tolerances and includes a metallization with nearly vertical sidewalls.

Subject Categories:

  • Electrooptical and Optoelectronic Devices

Distribution Statement:

APPROVED FOR PUBLIC RELEASE