Universal Timing Array.
DEPARTMENT OF THE AIR FORCE WASHINGTON DC
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A universal timing array UTA comprising a branch and increment logic circuit and multiple 2-bit counter cells is fabricated as a single large scale integrated circuit and is adapted to implementing various timing and control functions in digital computers and radar signal processors. Implementation of the UTA functional design using emitter coupled logic circuitry and special circuit design features improves UTA performance by increasing opertaing clock frequency, widening operating temperature range and reducing on-chip complexity. A specific embodiment utilizes a standard universal digital array chip having specially selected cell placements and interconnecting routing patterns. Author
- Electrical and Electronic Equipment
- Computer Hardware
- Active and Passive Radar Detection and Equipment