Accession Number:

ADD007852

Title:

Growth Technique for Preparing Graded Gap Semiconductors and Devices.

Descriptive Note:

Patent,

Corporate Author:

DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s):

Report Date:

1980-10-14

Pagination or Media Count:

19.0

Abstract:

A variable temperature method for the preparation of single and multiple epitaxial layers of single-phase e.g., face-centered cubic, ternary lead chalcogenide alloys e.g., lead cadmium sulfide, deposited upon substrates of barium fluoride, BaF2, maintained in near thermodynamic equilibrium with concurrently sublimated lead alloy and chalcogenide sources. During preparation, the temperature of the substrate is varied, thereby providing an epilayer with graded composition and predetermined electrical and optical properties along the direction of growth. This growth technique can be used to produce infrared lenses, narrowband detectors, and double heterojunction lasers.

Subject Categories:

  • Electrical and Electronic Equipment
  • Crystallography
  • Solid State Physics

Distribution Statement:

APPROVED FOR PUBLIC RELEASE