Failureresistant Pseudo-Nonvolatile Memory.
DEPARTMENT OF THE NAVY WASHINGTON DC
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Disclosed is a plurality of parallel resistive-capactive clamping circuits individually coupling the bit input and bit output terminals of a multi-bit, serialparallel SP, synchronousasynchronous SA shift register e.g., CD-4034A. The clamping circuits provide the contents of the shift register with an increased immunity from the effects of transients, radiation, and temporary power failures. Author
- Electrical and Electronic Equipment
- Computer Hardware