Accession Number:

ADD005020

Title:

Five-Stage Four-Bit Complex Multiplier.

Descriptive Note:

Patent,

Corporate Author:

DEPARTMENT OF THE AIR FORCE WASHINGTON D C

Report Date:

1978-04-25

Pagination or Media Count:

15.0

Abstract:

A multiplying system for complex numbers using four three-stage 4 x 4 bit 2s complement multipliers and a modified adder and subtractor. Two of the 2s complement multipliers are fed to the subtractor which produces a 9 bit output representing the real term of the complex product and the other 2s complement multipliers are fed to the adder which produces a 9 bit output representing the imaginary term of the complex product. Each of the 3-stage 2s complement multipliers are modified from prior art multipliers to effect the two most significant bits. The unique adder and subtractor as well as the multipliers are implemented with universal logic gates consisting of cascode circuit components resulting in five gating stages for the complex multiplying system. Author

Subject Categories:

  • Electrical and Electronic Equipment

Distribution Statement:

APPROVED FOR PUBLIC RELEASE