N-Channel Deep Depletion Mode Semiconductor Device.
DEPARTMENT OF THE AIR FORCE WASHINGTON D C
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The patent application overcomes problems relating to gate dielectric breakdown and parasitic current flow around device boundaries in N-channel deep depletion mode semiconductors by a device structure that positions the gate window internal to the silicon island and provides P diffusion regions between the extremes of the gate window and the island edge. The structure permits the use of a thin deposit of oxide over the gate window and a substantially thicker coating of oxide over the rest of the silicon island and its edges.
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