Accession Number:

ADA604029

Title:

Estimating Performance of Single Bus, Shared Memory Multiprocessors

Descriptive Note:

Master's thesis

Corporate Author:

CALIFORNIA UNIV BERKELEY DEPT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCES

Personal Author(s):

• Gibson, Garth

Report Date:

1987-05-01

Pagination or Media Count:

46.0

Abstract:

Given standard characteristics of processors and memory, we present two simple ways of estimating the performance of shared memory multiprocessors. At the cost of a few simple arithmetic operations, a computer designer can estimate the range of performance using our 4-point bound model. If more accuracy is required, we show that a one page program can estimate performance within 3 of trace-driven simulation, while reducing software development time, disk space, and CPU time by orders of magnitude. To demonstrate the use of our models, an application to the SPUR multiprocessor design is presented.

Descriptors:

• *MEMORY DEVICES
• *MULTIPROCESSORS
• ARITHMETIC
• COMPUTER PROGRAMS

Subject Categories:

• Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE