Accession Number:

ADA566362

Title:

Secure Hardware Design for Trust

Descriptive Note:

Interim technical rept. Aug 2011-Jun 2012

Corporate Author:

AIR FORCE RESEARCH LAB ROME NY INFORMATION DIRECTORATE

Personal Author(s):

Report Date:

2012-08-01

Pagination or Media Count:

17.0

Abstract:

A logic encryption LE algorithm has been developed to protect integrated circuits ICs from malicious attacks in the current supply chain model. Typical hardware attacks are performed by understanding functionality of designs. This technique is focused on obscuring the functionality of designs by inserting additional gates called key gates into the original design. The end user has to provide valid key bits to the key gates in order to enable correct functionality. In this approach, we leverage IC testing concepts to determine the locations of key gates. For XOR and multiplexer gate insertion techniques, Hamming distance HD as a security measure was analyzed using 10 benchmark circuits and the proof-of-concept was demonstrated with an AES core on an FPGA board. The goal is to achieve 50 of Hamming distance between the outputs on applying a correct key and an incorrect key. Most of the benchmark circuits encrypted with XOR or MUX gates achieved 50 of HD which proves the strength of the developed technique.

Subject Categories:

  • Cybernetics

Distribution Statement:

APPROVED FOR PUBLIC RELEASE