Accession Number:

ADA556730

Title:

RSA Power Analysis Obfuscation: A Dynamic FPGA Architecture

Descriptive Note:

Master's thesis

Corporate Author:

AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH SCHOOL OF ENGINEERING AND MANAGEMENT

Personal Author(s):

Report Date:

2012-03-01

Pagination or Media Count:

88.0

Abstract:

The modular exponentiation operation used in popular public key encryption schemes, such as RSA, has been the focus of many side channel analysis SCA attacks in recent years. Current SCA attack countermeasures are largely static. Given sufficient signal-to-noise ratio and a number of power traces, static countermeasures can be defeated, as they merely attempt to hide the power consumption of the system under attack. This research develops a dynamic countermeasure which constantly varies the timing and power consumption of each operation, making correlation between traces more diffcult than for static countermeasures. By randomizing the radix of encoding for Booth multiplication and randomizing the window size in exponentiation, this research produces a SCA countermeasure capable of increasing RSA SCA attack protection.

Subject Categories:

  • Countermeasures

Distribution Statement:

APPROVED FOR PUBLIC RELEASE