Design, Fabrication and Characterization of High-Performance Silicon Nanowire Transistors
GEORGE MASON UNIV FAIRFAX VA DEPT OF ELECTRICAL AND COMPUTER ENGINEERING
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We report the fabrication and characterization of double-gated Si nanowire field effect transistors with excellent current-voltage characteristics, low subthreshold slope 85 mVdec and high onoff current ratio 10exp 6. The Si nanowire devices are fabricated by using a self-aligned technique with standard photolithographic alignment and metal lift-off processes, enabling the large-scale integration of high-performance nanowire devices. We have also studied the effect of device structure and forming gas rapid thermal annealing on the nanowire transistors electrical properties. We conclude that the self-aligned fabrication and non-overlapped gate-sourcedrain structure combined with appropriate post annealing leads to the excellent observed device performance.
- Electrical and Electronic Equipment