Accession Number:

ADA463608

Title:

Feasibility Study of Nanoscale Semiconductor Manufacture Using Thermal Dip Pen Nanolithography

Descriptive Note:

Final technical rept. 1 Oct 2005-30 Sep 2006

Corporate Author:

GEORGIA TECH RESEARCH CORP ATLANTA

Personal Author(s):

Report Date:

2006-09-30

Pagination or Media Count:

7.0

Abstract:

This one-year feasibility study explored the use of thermal dip-pen nanolithography DPN for the purpose of nanoscale electronics manufacturing. In this project, we have demonstrated that using the thermal DPN technique that both indium metal, and semiconducting organic materials PDDT, PVDF can be written in arbitrary locations on semiconductor surfaces with sub-100 nm feature sizes. We have measured the electrical properties of these nanostructure deposits and found them to be electrically functional. This accomplishment opens new opportunities for nanoelectroopics manufacture and repair, where a functional deposit of an electronic material can be deposited in an arbitrary single location. Thus we can report success in this feasibility study.

Subject Categories:

  • Organic Chemistry
  • Electrical and Electronic Equipment
  • Electrooptical and Optoelectronic Devices

Distribution Statement:

APPROVED FOR PUBLIC RELEASE