Assembly of Ultra-Dense Nanowire-Based Computing Systems
Final technical rept. 1 Jul 2005-31 Mar 2006
HARVARD COLL CAMBRIDGE MA PRESIDENT AND FELLOWS
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Effective ultra-dense integrated digital information processing strains the leading edge of current chemistry and materials science, and requires hybrid top-down and bottom-up assembly techniques, with highly reliable defect- and fault-tolerant architecture. We have fabricated and assembled molecular-scale logic elements based on overlapping semiconducting nanowire arrays using novel wafer-scale assembly techniques. Based on breakthrough addressing techniques, we have connected these logic blocks to ultra-dense memory blocks, and to external CMOS-process lithographic interfaces for testing as well as test applications. Our architecture to construct highly reliable components out of high-defect-density logic and memory, using new sublithographic scale PLA array architectures include novel reliable circuit techniques and higher-level redundancy mechanisms. Using state-of-the-art modeling and simulation platforms, we have optimized test designs, developed defect-tolerance approaches, and are continuing to develop and optimize larger systems.
- Computer Programming and Software
- Computer Hardware