Accession Number:

ADA455511

Title:

VLSI Design of High-Speed Time-Recursive 2-D DCT/IDCT Processor for Video Applications

Descriptive Note:

Technical research rept.

Corporate Author:

MARYLAND UNIV COLLEGE PARK INST FOR SYSTEMS RESEARCH

Personal Author(s):

Report Date:

1994-01-01

Pagination or Media Count:

33.0

Abstract:

In this paper we present a full-custom VLSI design of high-speed 2-D DCTIDCT processor based on the new class of time-recursive algorithms and architectures which has never been implemented to prove its performance. We show that the VLSI implementation of this class of DCTIDCT algorithms can easily meet the high-speed requirements of HDTV due to its modularity, regularity, local connectivity, and scalability. Our design of the 8 x 8 DCTIDCT can operate at 50 MHz with a 400 Mbps throughput based on a very conservative estimate under 1.2 mu CMOS technology. In comparison to the existing designs, our approach offers many advantages that can be further explored for even higher performance.

Subject Categories:

  • Numerical Mathematics
  • Computer Hardware

Distribution Statement:

APPROVED FOR PUBLIC RELEASE