SLIIC: System-Level Intelligent Intensive Computing
Final rept. Mar 1999-Sep 2003
UNIVERSITY OF SOUTHERN CALIFORNIA MARINA DEL REY INFORMATION SCIENCES INST
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Recently several architectural approaches have been explored that promise to hide memory latency for applications that include data-intensive applications while improving scalability The SLIIC project demonstrated and compared some of the advantages and disadvantages of the PIM processor-in-memory and stream processing approaches to hiding memory latency. The SLIIC project built board prototypes for PIM and stream processing architectures and implemented data-intensive applications in simulation and in hardware to measure the performance. Speedups of up to 54 measured in cycles and 16 measured in execution time were obtained over commercial microprocessors.
- Computer Hardware