An Ultra-High Performance Architecture for Embedded Defense Signal and Image Processing Applications
WORLDSCAPE DEFENSE CO MARLTON NJ
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This briefing describes the development of a novel, ultra-high performance next-generation Single-InstructionMultiple-Data SIMD processing architecture originally designed to realize immersive, photo-realistic 3-D simulations. This low-power, Multi-Threaded Array Processor MTAP architecture provides for hundreds and ultimately thousands of processing elements, each with optional floating point hardware, to perform data parallel processing on image and signal processing applications as well as for compression, encryption, search, and general sensor processing applications. The technology is supported by a flexible development environment, including assembly language and C-based language support, as well as a cycle accurate simulator, with plans to develop industry standard API Libraries based upon VSIPL and, ultimately, HPEC-SI. This new technology, being developed by WorldScape and ClearSpeed, has been shown to provide ten to one hundred times the overall performance of PowerPC or Pentium-based architectures, especially when performing image and signal processing functions, such as FFTs or filters. In general, the architecture has been shown to provide significant throughput, size, and power advantages for embedded processing applications.
- Computer Hardware
- Computer Systems Management and Standards